ddsf:public:guidebook:06_append:glossary:r:risc
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ddsf:public:guidebook:06_append:glossary:r:risc [2021/07/14 15:53] murphy ↷ Links adapted because of a move operation |
ddsf:public:guidebook:06_append:glossary:r:risc [2021/07/15 12:22] (current) murphy ↷ Links adapted because of a move operation |
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| ===== Reduced Instruction Set Computer (RISC) ===== | ===== Reduced Instruction Set Computer (RISC) ===== | ||
| - | [[ddsf:private:guidebook:06_append:glossary:start| Return to Glossary ]] | + | [[ddsf:public:guidebook:06_append:glossary:start| Return to Glossary ]] |
| **Reduced Instruction Set Computer (RISC)** is a computer that uses a [[ddsf:public:guidebook:06_append:glossary:c:cpu]] that implements the [[ddsf:public:guidebook:06_append:glossary:p:processor|processor]] design principle of simplified instructions. To date, RISC is the most efficient CPU architecture technology. | **Reduced Instruction Set Computer (RISC)** is a computer that uses a [[ddsf:public:guidebook:06_append:glossary:c:cpu]] that implements the [[ddsf:public:guidebook:06_append:glossary:p:processor|processor]] design principle of simplified instructions. To date, RISC is the most efficient CPU architecture technology. | ||
ddsf/public/guidebook/06_append/glossary/r/risc.1626292406.txt.gz · Last modified: 2021/07/14 15:53 by murphy
