===== Reduced Instruction Set Computer (RISC) =====
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**Reduced Instruction Set Computer (RISC)** is a computer that uses a [[ddsf:public:guidebook:06_append:glossary:c:cpu]] that implements the [[ddsf:public:guidebook:06_append:glossary:p:processor|processor]] design principle of simplified instructions. To date, RISC is the most efficient CPU architecture technology.

This architecture is an evolution and alternative to [[ddsf:public:guidebook:06_append:glossary:c:cisc]]. With RISC, the basic concept is to have simple instructions that do less but execute very quickly to provide better [[ddsf:public:guidebook:06_append:glossary:p:performance|performance]].

Source: [[https://www.techopedia.com/definition/2887/reduced-instruction-set-computer-risc | Reduced Instruction Set Computer (RISC) ]]