dido:public:ra:xapend:xapend.a_glossary:c:cisc
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dido:public:ra:xapend:xapend.a_glossary:c:cisc [2020/12/08 14:04] nick |
dido:public:ra:xapend:xapend.a_glossary:c:cisc [2021/10/04 13:40] (current) 50.19.247.197 ↷ Links adapted because of a move operation |
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| - | ====== Complex Instruction Set Computer (CISC) ====== | + | ===== Complex Instruction Set Computer (CISC) ===== |
| - | [[dido:public:ra:xapend:xapend.a_glossary | Return to Glossary ]] | + | [[dido:public:ra:xapend:xapend.a_glossary:start| Return to Glossary ]] |
| - | **Complex Instruction Set Computer (CISC)** is a computer in which single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions. The term was retroactively coined in contrast to [[dido:public:ra:xapend:xapend.a_glossary:r:risc]][1] and has therefore become something of an umbrella term for everything that is not RISC, from large and complex mainframe computers to simplistic [[dido:public:ra:xapend:xapend.a_glossary:m:microcontroller]] where memory load and store operations are not separated from arithmetic instructions. A modern RISC [[dido:public:ra:xapend:xapend.a_glossary:p:processor|processor]] can therefore be much more complex than, say, a modern microcontroller using a CISC-labeled instruction set, especially in the complexity of its electronic circuits, but also in the number of instructions or the complexity of their encoding patterns. The only typical differentiating characteristic is that most RISC designs use uniform instruction length for almost all instructions, and employ strictly separate load/store-instructions. | + | **Complex Instruction Set Computer (CISC)** is a computer in which single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions. The term was retroactively coined in contrast to [[dido:public:ra:xapend:xapend.a_glossary:r:risc]] and has therefore become something of an umbrella term for everything that is not RISC, from large and complex mainframe computers to simplistic [[dido:public:ra:xapend:xapend.a_glossary:m:microcontroller]] where memory load and store operations are not separated from arithmetic instructions. A modern RISC [[dido:public:ra:xapend:xapend.a_glossary:p:processor|processor]] can therefore be much more complex than, say, a modern microcontroller using a CISC-labeled instruction set, especially in the complexity of its electronic circuits, but also in the number of instructions or the complexity of their encoding patterns. The only typical differentiating characteristic is that most RISC designs use uniform instruction length for almost all instructions, and employ strictly separate load/store-instructions. |
| Source: [[https://en.wikipedia.org/wiki/Complex_instruction_set_computer | Complex Instruction Set Computer (CISC) ]] | Source: [[https://en.wikipedia.org/wiki/Complex_instruction_set_computer | Complex Instruction Set Computer (CISC) ]] | ||
dido/public/ra/xapend/xapend.a_glossary/c/cisc.1607454271.txt.gz · Last modified: 2020/12/08 14:04 by nick
