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dido:public:ra:xapend:xapend.a_glossary:r:risc [2020/11/16 15:30] nick created |
dido:public:ra:xapend:xapend.a_glossary:r:risc [2021/10/04 13:40] (current) 50.19.247.197 ↷ Links adapted because of a move operation |
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| ===== Reduced Instruction Set Computer (RISC) ===== | ===== Reduced Instruction Set Computer (RISC) ===== | ||
| - | [[dido:public:ra:xapend:xapend.a_glossary | Return to Glossary ]] | + | [[dido:public:ra:xapend:xapend.a_glossary:start| Return to Glossary ]] |
| - | **Reduced Instruction Set Computer (RISC)** is a computer that uses a [[dido:public:ra:xapend:xapend.a_glossary:c:cpu]] that implements the [[dido:public:ra:xapend:xapend.a_glossary:p:processor|processor]] design principle of simplified instructions. To date, RISC is the most efficient CPU architecture technology. | + | **Reduced Instruction Set Computer (RISC)** is a computer that uses a [[dido:public:ra:xapend:xapend.a_glossary:c:cpu]] that implements the [[dido:public:ra:xapend:xapend.a_glossary:p:processor|processor]] design [[dido:public:ra:xapend:xapend.a_glossary:p:principle|principle]] of simplified instructions. To date, RISC is the most efficient CPU architecture technology. |
| This architecture is an evolution and alternative to [[dido:public:ra:xapend:xapend.a_glossary:c:cisc]]. With RISC, the basic concept is to have simple instructions that do less but execute very quickly to provide better [[dido:public:ra:xapend:xapend.a_glossary:p:performance|performance]]. | This architecture is an evolution and alternative to [[dido:public:ra:xapend:xapend.a_glossary:c:cisc]]. With RISC, the basic concept is to have simple instructions that do less but execute very quickly to provide better [[dido:public:ra:xapend:xapend.a_glossary:p:performance|performance]]. | ||