dido:public:ra:1.4_req:1_func:platform:hw_arch
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dido:public:ra:1.4_req:1_func:platform:hw_arch [2020/12/04 15:07] nick |
dido:public:ra:1.4_req:1_func:platform:hw_arch [2021/08/17 15:12] (current) murphy |
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| - | ====== 4.1.1.1 Hardware Platform ====== | + | ====== 4.2.1.1 Hardware Platform ====== |
| [[dido:public:ra:1.4_req:1_func:platform| Return to Platforms ]] | [[dido:public:ra:1.4_req:1_func:platform| Return to Platforms ]] | ||
| - | In [[dido:public:ra:xapend:xapend.a_glossary:d:distsystem]], each [[dido:public:ra:xapend:xapend.a_glossary:n:netnode]] in the [[dido:public:ra:xapend:xapend.a_glossary:n:node_network]] is associated with a [[dido:public:ra:xapend:xapend.a_glossary:c:computer_architecture]]. As a consequence, a requirement of the distributed system is to specifically identify the computer architectures which are permitted | + | ===== About ===== |
| + | In a [[dido:public:ra:xapend:xapend.a_glossary:d:distsystem]], each [[dido:public:ra:xapend:xapend.a_glossary:n:netnode]] in the [[dido:public:ra:xapend:xapend.a_glossary:n:node_network]] is associated with a [[dido:public:ra:xapend:xapend.a_glossary:c:computer_architecture]]. As a consequence, a [[dido:public:ra:xapend:xapend.a_glossary:r:requirement|requirement]] of the distributed system is to identify specifically the [[dido:public:ra:xapend:xapend.a_glossary:c:computer_architecture|computer architectures]] that are permitted. | ||
| - | Gyanu Kumar gave an excellent review of the computer architectures. This list summarizing his findings is provided here as a reference. For details about each of these architectures, please use the original work.(( | + | It is not a simple task. For example, a coin DIDO might not initially consider a need to support embedded systems, however, the system might need to support Point-of-Sale operations, and as a general rule, these are implemented as embedded systems. |
| - | Gyanu Kumar, __What are the types of computer architectures in a CPU?__, | + | |
| - | 19 May 2019, Accessed 24 May 2020, | + | Another example, might be a [[dido:public:ra:xapend:xapend.a_glossary:s:supplychain|supply chain]] DIDO. It might be obvious that this implementation requires embedded systems to read bar codes, RFIDs, and to monitor sensors used in production. As initially conceived, the system may not need Handheld Computers since the results of the embedded systems will be processed by [[dido:public:ra:xapend:xapend.a_glossary:s:server|Servers]]. However, often inventory is now being made available using general purpose smartphones that can even provide maps of where to find the item within the warehouse. Is it far fetched to believe that Amazon may need to employ a supercomputer to help analyze the 1.3B transactions a day? Imagine trying to play "what-if" games with that kind of data and getting responses back in a useful time frame. (( |
| - | [[https://www.quora.com/What-are-the-types-of-computer-architectures-in-a-CPU]] | + | Conga; __What’s Under the Hood Supporting 1.3B Transactions a Day? Salesforce by the Numbers__, 31 October 2020, Accessed 8 December 2020, |
| + | [[https://apttus.com/blog/salesforce-by-the-numbers/]] | ||
| )) | )) | ||
| - | ===== Embedded CPU architectures ===== | + | * [[dido:public:ra:xapend:xapend.c_hwarch:1_embedded | Embedded Systems ]] |
| - | [[dido:public:ra:1.4_req:1_func:platform:hw_arch| Return to Top]] | + | * [[dido:public:ra:xapend:xapend.c_hwarch:server | Servers ]] |
| - | + | * [[dido:public:ra:xapend:xapend.c_hwarch:desktop | Desktops ]] | |
| - | * [[dido:public:ra:xapend:xapend.c_hwarch:arm]] ARM, sARM architecture (32-bit)ARM64 (64/32-bit) | + | * [[dido:public:ra:xapend:xapend.c_hwarch:handheld | Handheld Computers]] |
| - | * [[dido:public:ra:xapend:xapend.c_hwarch:avr]] Atmel's AVR architecture | + | * [[dido:public:ra:xapend:xapend.c_hwarch:super | Supercomputers ]] |
| - | * [[dido:public:ra:xapend:xapend.c_hwarch:pic]] Microchip's PIC architecture | + | * [[dido:public:ra:xapend:xapend.c_hwarch:network | Network Computers ]] |
| - | * [[dido:public:ra:xapend:xapend.c_hwarch:msp430]] Texas Instruments's MSP430 architecture | + | |
| - | * [[dido:public:ra:xapend:xapend.c_hwarch:mcs-51]] Intel's 8051 architecture | + | |
| - | * [[dido:public:ra:xapend:xapend.c_hwarch:z80]] Zilog's Z80 architecture | + | |
| - | * Western Design Center's 65816 architecture | + | |
| - | * Hitachi's SuperH architecture | + | |
| - | * Axis Communications' ETRAX CRIS architecture | + | |
| - | * Power Architecture (formerly PowerPC) | + | |
| - | * EnSilica's eSi-RISC architecture | + | |
| - | * Milkymist architecture | + | |
| - | * Inmos' Transputer architectures | + | |
| - | + | ||
| - | ===== Microcomputer CPU architectures ===== | + | |
| - | [[dido:public:ra:1.4_req:1_func:platform:hw_arch| Return to Top]] | + | |
| - | + | ||
| - | * Pre-x86 | + | |
| - | * x86 Intel's IA-32 architecture, also called x86-32x86-64 with AMD's AMD64 and Intel's Intel 64 version of it | + | |
| - | * Motorola's 6800 and 68000 architectures | + | |
| - | * MOS Technology's 6502 architecture | + | |
| - | * Zilog's Z80 architecture | + | |
| - | * Power Architecture (formerly POWER and PowerPC) | + | |
| - | * ARM'sARM (32-bit) (previously Advanced RISC Machines ARM, originally Acorn's RISC Machine) and StrongARM /XScale architecturesARM64 (64/32-bit) | + | |
| - | * Renesas RX CPU architecture - Combination of RISC and CISC architectures | + | |
| - | + | ||
| - | ===== Workstation/Ser ver CPU Architectures ===== | + | |
| - | [[dido:public:ra:1.4_req:1_func:platform:hw_arch| Return to Top]] | + | |
| - | + | ||
| - | * DEC's Alpha architecture | + | |
| - | * HP's PA-RISC architecture | + | |
| - | * Power Architecture (formerly POWER and PowerPC) | + | |
| - | * Intel's Itanium architecture (formerly IA-64) | + | |
| - | * MIPS Computer Systems Inc.'s MIPS architecture | + | |
| - | * Oracle's (formerly Sun Microsystems's) SPARC architecture | + | |
| - | + | ||
| - | ===== Mini/Mainframe CPU architectures ===== | + | |
| - | [[dido:public:ra:1.4_req:1_func:platform:hw_arch| Return to Top]] | + | |
| - | + | ||
| - | * Burroughs large systems architecture (1961–present) currently supported in the Unisys ClearPath/MCP series. | + | |
| - | * IBM's System/360, System/370, ESA/390 and z/Architecture (1964–present) | + | |
| - | * DEC's PDP-8 architecture, the successor PDP-11 architecture, and its final form, the VAX architecture | + | |
| - | * UNIVAC 1100/2200 series architecture (currently supported by Unisys ClearPath IX computers) | + | |
| - | * MIL-STD-1750A - the U.S.'s military standard computer | + | |
| - | * AP-101 - the space shuttle's computer | + | |
| - | + | ||
| - | ===== Mixed-core CPU architectures ===== | + | |
| - | [[dido:public:ra:1.4_req:1_func:platform:hw_arch| Return to Top]] | + | |
| - | + | ||
| - | * IBM's Cell architecture (a general purpose architecture that uses a POWER4 based core and 8 RISC based co-processors) | + | |
| - | * CAS's Loongson | + | |
| - | * Parallax Propeller, a 160 MIPS multicore microcontroller with eight 32-bit RISC cores. | + | |
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dido/public/ra/1.4_req/1_func/platform/hw_arch.1607112437.txt.gz · Last modified: 2020/12/04 15:07 by nick
